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 74F14 Hex Inverter Schmitt Trigger
March 1988 Revised July 1999
74F14 Hex Inverter Schmitt Trigger
General Description
The 74F14 contains six logic inverters which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. In addition, they have a greater noise margin than conventional inverters. Each circuit contains a Schmitt trigger followed by a Darlington level shifter and a phase splitter driving a TTL totem-pole output. The Schmitt trigger uses positive feed back to effectively speed-up slow input transition, and provide different input threshold voltages for positive and negative-going transitions. This hysteresis between the positive-going and negative-going input thresholds (typically 800 mV) is determined internally by resistor ratios and is essentially insensitive to temperature and supply voltage variations.
Ordering Code:
Order Number 74F14SC 74F14SJ 74F14PC Package Number M14A M14D N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Unit Loading/Fan Out
U.L. Pin Names Description In On Input Output 1.0/1.0 50/33.3 Input IIH/IIL
Function Table
Input A L H
H = HIGH Voltage Level L = LOW Voltage Level
Output O H L
HIGH/LOW Output IOH/IOL 20 A/-0.6 mA -1 mA/20 mA
(c) 1999 Fairchild Semiconductor Corporation
DS009461
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74F14
Absolute Maximum Ratings(Note 1)
Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output 3-STATE Output Current Applied to Output in LOW State (Max) ESD Last Passing Voltage (Min) twice the rated IOL (mA) 4000V -0.5V to VCC -0.5V to +5.5V -65C to +150C -55C to +125C -55C to +175C -0.5V to +7.0V -0.5V to +7.0V -30 mA to +5.0 mA
Recommended Operating Conditions
Free Air Ambient Temperature Supply Voltage 0C to +70C +4.5V to +5.5V
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol VT+ VT- VT VCD VOH VOL IIH IBVI ICEX VID IOD IIL IOS ICCH ICCL Parameter Positive-Going Threshold Negative-Going Threshold Hysteresis (VT+-VT-) Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Output HIGH Leakage Current Input Leakage Test Output Leakage Circuit Current Input LOW Current Output Short-Circuit Current Power Supply Current Power Supply Current -60 4.75 3.75 -0.6 -150 25 25 10% VCC 5% VCC 10% VCC 2.5 2.7 0.5 5.0 7.0 50 Min 1.5 0.7 0.4 Typ 1.7 0.9 0.8 -1.2 Max 2.0 1.1 Units V V V V V V A A A V A mA mA mA mA VCC 5.0V 5.0V 5.0V Min Min Min Max Max Max Max 0.0 Max Max Max Max IIN = -18 mA IOH = -1 mA IOH = -1 mA IOL = 20 mA VIN = 2.7V VIN = 7.0V VOUT = VCC IID = 1.9 A All Other Pins Grounded VIOD = 150 mV All Other Pins Grounded VIN = 0.5V VOUT = 0V VO = HIGH VO = LOW Conditions
AC Electrical Characteristics
TA = +25C Symbol Parameter VCC = +5.0V CL = 50 pF Min tPLH tPHL Propagation Delay InO
n
TA = -55C to +125C VCC = +5.0V CL = 50 pF Min 4.0 3.5 Max 13.0 10.0
TA = 0C to +70C VCC = +5.0V CL = 50 pF Min 4.0 3.5 Max 11.5 9.0 ns Units
Max 10.5 8.5
4.0 3.5
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2
74F14
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow Package Number M14A
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D
3
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74F14 Hex Inverter Schmitt Trigger
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 4 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com


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